@@ -62,49 +62,70 @@ static Intrinsics()
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{
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Type nt = typeof ( Numbers ) ;
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Type rtt = typeof ( RT ) ;
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- Type ut = typeof ( Util ) ;
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+ Type utilt = typeof ( Util ) ;
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Type it = typeof ( int ) ;
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Type dt = typeof ( double ) ;
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Type lt = typeof ( long ) ;
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+ Type ut = typeof ( ulong ) ;
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Type boolt = typeof ( bool ) ;
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Type [ ] ddta = new Type [ ] { dt , dt } ;
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Type [ ] llta = new Type [ ] { lt , lt } ;
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Type [ ] iita = new Type [ ] { it , it } ;
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+ Type [ ] uuta = new Type [ ] { ut , ut } ;
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Type [ ] bbta = new Type [ ] { boolt , boolt } ;
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Type [ ] dta = new Type [ ] { dt } ;
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Type [ ] lta = new Type [ ] { lt } ;
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Type [ ] ita = new Type [ ] { it } ;
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+ Type [ ] uta = new Type [ ] { ut } ;
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Type [ ] fta = new Type [ ] { typeof ( float ) } ;
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Type [ ] sta = new Type [ ] { typeof ( short ) } ;
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Type [ ] bta = new Type [ ] { typeof ( byte ) } ;
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- Type [ ] ulta = new Type [ ] { typeof ( ulong ) } ;
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Type [ ] uita = new Type [ ] { typeof ( uint ) } ;
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Type [ ] usta = new Type [ ] { typeof ( ushort ) } ;
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Type [ ] sbta = new Type [ ] { typeof ( sbyte ) } ;
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- AddOp ( nt , "add" , ddta , OpCodes . Add ) ;
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+ // bitwise
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AddOp ( nt , "and" , llta , OpCodes . And ) ;
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AddOp ( nt , "or" , llta , OpCodes . Or ) ;
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AddOp ( nt , "xor" , llta , OpCodes . Xor ) ;
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+ AddOp ( nt , "shiftLeft" , llta , OpCodes . Shl ) ;
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+ AddOp ( nt , "shiftRight" , llta , OpCodes . Shr ) ;
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+ AddOp ( nt , "unsignedShiftRight" , llta , OpCodes . Shr_Un ) ;
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+ AddOp ( nt , "shiftLeftInt" , iita , OpCodes . Shl ) ;
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+ AddOp ( nt , "shiftRightInt" , iita , OpCodes . Shr ) ;
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+ AddOp ( nt , "unsignedShiftRightInt" , iita , OpCodes . Shr_Un ) ;
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+ // TODO: add ulong overloads in Numbers.
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+ //AddOp(nt, "and", uuta, OpCodes.And);
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+ //AddOp(nt, "or", uuta, OpCodes.Or);
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+ //AddOp(nt, "xor", uuta, OpCodes.Xor);
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+ //AddOp(nt, "shiftLeft", uuta, OpCodes.Shl);
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+ //AddOp(nt, "shiftRight", uuta, OpCodes.Shr);
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+ //AddOp(nt, "unsignedShiftRight", uuta, OpCodes.Shr_Un);
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+
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+ // arithmetic on doubles
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+ AddOp ( nt , "add" , ddta , OpCodes . Add ) ;
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AddOp ( nt , "multiply" , ddta , OpCodes . Mul ) ;
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AddOp ( nt , "divide" , ddta , OpCodes . Div ) ;
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- AddOp ( nt , "remainder" , llta , OpCodes . Rem ) ;
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- AddOp ( nt , "shiftLeft" , llta , OpCodes . Shl ) ;
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- AddOp ( nt , "shiftRight" , llta , OpCodes . Shr ) ;
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- AddOp ( nt , "unsignedShiftRight" , llta , OpCodes . Shr_Un ) ;
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AddOp ( nt , "minus" , dta , OpCodes . Neg ) ;
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AddOp ( nt , "minus" , ddta , OpCodes . Sub ) ;
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AddOp ( nt , "inc" , dta , OpCodes . Ldc_I4_1 , OpCodes . Conv_R8 , OpCodes . Add ) ;
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AddOp ( nt , "dec" , dta , OpCodes . Ldc_I4_1 , OpCodes . Conv_R8 , OpCodes . Sub ) ;
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+
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+
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+ // integer ops
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+ AddOp ( nt , "remainder" , llta , OpCodes . Rem ) ;
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+ AddOp ( nt , "remainder" , uuta , OpCodes . Rem_Un ) ;
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+
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AddOp ( nt , "quotient" , llta , OpCodes . Div ) ;
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- AddOp ( nt , "shiftLeftInt" , iita , OpCodes . Shl ) ;
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- AddOp ( nt , "shiftRightInt" , iita , OpCodes . Shr ) ;
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- AddOp ( nt , "unsignedShiftRightInt" , iita , OpCodes . Shr_Un ) ;
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+ AddOp ( nt , "quotient" , uuta , OpCodes . Div_Un ) ;
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+
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+
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+ // unchecked int ops
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AddOp ( nt , "unchecked_int_add" , iita , OpCodes . Add ) ;
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AddOp ( nt , "unchecked_int_subtract" , iita , OpCodes . Sub ) ;
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AddOp ( nt , "unchecked_int_negate" , ita , OpCodes . Neg ) ;
@@ -113,19 +134,35 @@ static Intrinsics()
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AddOp ( nt , "unchecked_int_multiply" , iita , OpCodes . Mul ) ;
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AddOp ( nt , "unchecked_int_divide" , iita , OpCodes . Div ) ;
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AddOp ( nt , "unchecked_int_remainder" , iita , OpCodes . Rem ) ;
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+
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+ // long/ulong/double unchecked ops
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AddOp ( nt , "unchecked_add" , llta , OpCodes . Add ) ;
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- AddOp ( nt , "unchecked_add" , ddta , OpCodes . Add ) ;
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+ AddOp ( nt , "unchecked_add" , uuta , OpCodes . Add ) ;
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+ AddOp ( nt , "unchecked_add" , ddta , OpCodes . Add ) ;
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+
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AddOp ( nt , "unchecked_minus" , lta , OpCodes . Neg ) ;
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- AddOp ( nt , "unchecked_minus" , dta , OpCodes . Neg ) ;
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+ AddOp ( nt , "unchecked_minus" , uta , OpCodes . Neg ) ;
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+ AddOp ( nt , "unchecked_minus" , dta , OpCodes . Neg ) ;
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+
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AddOp ( nt , "unchecked_minus" , ddta , OpCodes . Sub ) ;
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- AddOp ( nt , "unchecked_minus" , llta , OpCodes . Sub ) ;
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- AddOp ( nt , "unchecked_multiply" , llta , OpCodes . Mul ) ;
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+ AddOp ( nt , "unchecked_minus" , uuta , OpCodes . Sub ) ;
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+ AddOp ( nt , "unchecked_minus" , llta , OpCodes . Sub ) ;
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+
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+
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AddOp ( nt , "unchecked_multiply" , llta , OpCodes . Mul ) ;
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+ AddOp ( nt , "unchecked_multiply" , uuta , OpCodes . Mul ) ;
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+ AddOp ( nt , "unchecked_multiply" , llta , OpCodes . Mul ) ;
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+
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+
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AddOp ( nt , "unchecked_inc" , lta , OpCodes . Ldc_I4_1 , OpCodes . Conv_I8 , OpCodes . Add ) ;
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- AddOp ( nt , "unchecked_inc" , dta , OpCodes . Ldc_I4_1 , OpCodes . Conv_R8 , OpCodes . Add ) ;
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+ AddOp ( nt , "unchecked_inc" , uta , OpCodes . Ldc_I4_1 , OpCodes . Conv_U8 , OpCodes . Add ) ;
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+ AddOp ( nt , "unchecked_inc" , dta , OpCodes . Ldc_I4_1 , OpCodes . Conv_R8 , OpCodes . Add ) ;
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+
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AddOp ( nt , "unchecked_dec" , lta , OpCodes . Ldc_I4_1 , OpCodes . Conv_I8 , OpCodes . Sub ) ;
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- AddOp ( nt , "unchecked_dec" , dta , OpCodes . Ldc_I4_1 , OpCodes . Conv_R8 , OpCodes . Sub ) ;
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+ AddOp ( nt , "unchecked_dec" , uta , OpCodes . Ldc_I4_1 , OpCodes . Conv_U8 , OpCodes . Sub ) ;
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+ AddOp ( nt , "unchecked_dec" , dta , OpCodes . Ldc_I4_1 , OpCodes . Conv_R8 , OpCodes . Sub ) ;
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+ // Array ops
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AddOp ( rtt , "aget" , new Type [ ] { typeof ( float [ ] ) , typeof ( int ) } , OpCodes . Ldelem_R4 ) ;
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AddOp ( rtt , "aget" , new Type [ ] { typeof ( double [ ] ) , typeof ( int ) } , OpCodes . Ldelem_R8 ) ;
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AddOp ( rtt , "aget" , new Type [ ] { typeof ( byte [ ] ) , typeof ( int ) } , OpCodes . Ldelem_U1 ) ;
@@ -162,7 +199,7 @@ static Intrinsics()
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AddOp ( rtt , "doubleCast" , ita , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "doubleCast" , sta , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "doubleCast" , bta , OpCodes . Conv_R8 ) ;
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- AddOp ( rtt , "doubleCast" , ulta , OpCodes . Conv_R8 ) ;
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+ AddOp ( rtt , "doubleCast" , uta , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "doubleCast" , uita , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "doubleCast" , usta , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "doubleCast" , sbta , OpCodes . Conv_R8 ) ;
@@ -173,7 +210,7 @@ static Intrinsics()
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AddOp ( rtt , "uncheckedDoubleCast" , ita , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "uncheckedDoubleCast" , sta , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "uncheckedDoubleCast" , bta , OpCodes . Conv_R8 ) ;
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- AddOp ( rtt , "uncheckedDoubleCast" , ulta , OpCodes . Conv_R8 ) ;
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+ AddOp ( rtt , "uncheckedDoubleCast" , uta , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "uncheckedDoubleCast" , uita , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "uncheckedDoubleCast" , usta , OpCodes . Conv_R8 ) ;
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AddOp ( rtt , "uncheckedDoubleCast" , sbta , OpCodes . Conv_R8 ) ;
@@ -182,18 +219,20 @@ static Intrinsics()
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AddOp ( rtt , "longCast" , ita , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "longCast" , sta , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "longCast" , bta , OpCodes . Conv_I8 ) ;
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- AddOp ( rtt , "longCast" , ulta , OpCodes . Conv_I8 ) ;
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+ AddOp ( rtt , "longCast" , uta , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "longCast" , uita , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "longCast" , usta , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "longCast" , sbta , OpCodes . Conv_I8 ) ;
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+ // Todo: reimplement RT.ulongCast and implement these intrinsics
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+
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AddOp ( rtt , "uncheckedIntCast" , lta , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , dta , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , fta , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , ita , OpCodes . Nop ) ;
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AddOp ( rtt , "uncheckedIntCast" , sta , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , bta , OpCodes . Conv_I4 ) ;
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- AddOp ( rtt , "uncheckedIntCast" , ulta , OpCodes . Conv_I4 ) ;
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+ AddOp ( rtt , "uncheckedIntCast" , uta , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , uita , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , usta , OpCodes . Conv_I4 ) ;
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AddOp ( rtt , "uncheckedIntCast" , sbta , OpCodes . Conv_I4 ) ;
@@ -204,32 +243,60 @@ static Intrinsics()
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AddOp ( rtt , "uncheckedLongCast" , ita , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "uncheckedLongCast" , sta , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "uncheckedLongCast" , bta , OpCodes . Conv_I8 ) ;
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- AddOp ( rtt , "uncheckedLongCast" , ulta , OpCodes . Conv_I8 ) ;
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+ AddOp ( rtt , "uncheckedLongCast" , uta , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "uncheckedLongCast" , uita , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "uncheckedLongCast" , usta , OpCodes . Conv_I8 ) ;
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AddOp ( rtt , "uncheckedLongCast" , sbta , OpCodes . Conv_I8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , lta , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , dta , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , fta , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , ita , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , sta , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , bta , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , uta , OpCodes . Nop ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , uita , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , usta , OpCodes . Conv_U8 ) ;
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+ AddOp ( rtt , "uncheckedULongCast" , sbta , OpCodes . Conv_U8 ) ;
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+
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+ // Predicates
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+
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AddPred ( nt , "lt" , ddta , OpCodes . Bge ) ;
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+ AddPred ( nt , "lt" , uuta , OpCodes . Bge_Un ) ;
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AddPred ( nt , "lt" , llta , OpCodes . Bge ) ;
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+
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AddPred ( nt , "equiv" , ddta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+ AddPred ( nt , "equiv" , uuta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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AddPred ( nt , "equiv" , llta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+
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AddPred ( nt , "lte" , ddta , OpCodes . Bgt ) ;
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+ AddPred ( nt , "lte" , uuta , OpCodes . Bgt_Un ) ;
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AddPred ( nt , "lte" , llta , OpCodes . Bgt ) ;
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+
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AddPred ( nt , "gt" , ddta , OpCodes . Ble ) ;
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+ AddPred ( nt , "gt" , uuta , OpCodes . Ble_Un ) ;
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AddPred ( nt , "gt" , llta , OpCodes . Ble ) ;
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+
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AddPred ( nt , "gte" , ddta , OpCodes . Blt ) ;
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+ AddPred ( nt , "gte" , uuta , OpCodes . Blt_Un ) ;
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AddPred ( nt , "gte" , llta , OpCodes . Blt ) ;
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- AddPred ( ut , "equiv" , llta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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- AddPred ( ut , "equiv" , ddta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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- AddPred ( ut , "equiv" , bbta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+ AddPred ( utilt , "equiv" , llta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+ AddPred ( utilt , "equiv" , uuta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+ AddPred ( utilt , "equiv" , ddta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+ AddPred ( utilt , "equiv" , bbta , OpCodes . Ceq , OpCodes . Brfalse ) ;
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AddPred ( nt , "isZero" , dta , OpCodes . Ldc_I4_0 , OpCodes . Conv_R8 , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+ AddPred ( nt , "isZero" , uta , OpCodes . Ldc_I4_0 , OpCodes . Conv_U8 , OpCodes . Ceq , OpCodes . Brfalse ) ;
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AddPred ( nt , "isZero" , lta , OpCodes . Ldc_I4_0 , OpCodes . Conv_I8 , OpCodes . Ceq , OpCodes . Brfalse ) ;
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+
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AddPred ( nt , "isPos" , dta , OpCodes . Ldc_I4_0 , OpCodes . Conv_R8 , OpCodes . Ble ) ;
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+ AddPred ( nt , "isPos" , uta , OpCodes . Ldc_I4_0 , OpCodes . Conv_U8 , OpCodes . Ble ) ;
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AddPred ( nt , "isPos" , lta , OpCodes . Ldc_I4_0 , OpCodes . Conv_I8 , OpCodes . Ble ) ;
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+
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AddPred ( nt , "isNeg" , dta , OpCodes . Ldc_I4_0 , OpCodes . Conv_R8 , OpCodes . Bge ) ;
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- AddPred ( nt , "isNeg" , lta , OpCodes . Ldc_I4_0 , OpCodes . Conv_I8 , OpCodes . Bge ) ;
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+ AddPred ( nt , "isNeg" , uta , OpCodes . Ldc_I4_0 , OpCodes . Conv_U8 , OpCodes . Bge ) ;
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+ AddPred ( nt , "isNeg" , lta , OpCodes . Ldc_I4_0 , OpCodes . Conv_I8 , OpCodes . Bge ) ;
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}
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#endregion
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